1. Field
Embodiments of the inventive concept relate to a system interconnection, and more particularly, to a system interconnection capable of allocating a plurality of outstanding transactions to a single slot, a system-on-chip (SOC) including the system interconnection, and/or a method of driving a SOC.
2. Description of Related Art
A system-on-chip (SOC) technique is a semiconductor technique of combining conventional complicated systems under a single chip. Techniques for realizing SOCs have been studied and considered. In particular, a method of connecting intellectual properties (IPs) embedded in a chip has become considerably critical.
In general, an SOC includes a processor configured to control an entire system and various IPs controlled by the processor. The IPs may be classified into a slave IP, which may be always under control of the processor, and a master IP capable of requesting data communications from other slave IPs. In some embodiments, a single IP may serve as both a slave IP and a master IP.
As bus standard protocols for connecting and managing IPs of SOCs evolve and grow in popularity, there are available an Advanced Microcontroller Bus Architecture (AMBA) by ARM, Ltd. and a SONIC's Open Core Protocol (OCP). AMBA's bus types include Advanced High-Performance Bus (AHB), Advanced Peripheral Bus (APB), and Advanced eXtensible Interface (AXI).
Among these, AMBA and AXI protocols may be bus protocols, which may be appropriate for high-speed/high-performance systems as compared with a conventional on-chip bus protocol. According to the AMBA and AXI protocols, channels related to a read operation, a write operation, and a write response may be separated from one another and independently operate. Also, the AMBA and AXI protocols may have transaction characteristics, such as multiple-outstanding addresses and write data interleaving.